fix typo
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@ -19,7 +19,7 @@ executes in four phases:
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available RAM to prevent LTO thrashing. The target registry is loaded.
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available RAM to prevent LTO thrashing. The target registry is loaded.
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2. **Setup** — A volatile cleanroom (ramfs) is provisioned at the configured
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2. **Setup** — A volatile cleanroom (ramfs) is provisioned at the configured
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mount point. Source tarballs are verified against their SHA-256 checksums.
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mount point. Source tarballs are verified against their SHA-256 checksums.
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3. **STOP USING THIS WORD >>>Build** — Core components are built sequentially:
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3. **Build** — Core components are built sequentially:
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Binutils → Kernel Headers → GCC Stage 1 → C Library (glibc or musl) → GCC Stage 2 → Kernel.
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Binutils → Kernel Headers → GCC Stage 1 → C Library (glibc or musl) → GCC Stage 2 → Kernel.
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Both GCC stages are configured with `--with-arch=<march>` and `--with-cpu=<march>`
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Both GCC stages are configured with `--with-arch=<march>` and `--with-cpu=<march>`
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to default to the target microarchitecture.
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to default to the target microarchitecture.
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