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Jeremy Anderson 2026-07-24 17:02:19 -04:00
parent 2b6a5aab53
commit 712241660c
1 changed files with 1 additions and 1 deletions

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@ -19,7 +19,7 @@ executes in four phases:
available RAM to prevent LTO thrashing. The target registry is loaded.
2. **Setup** — A volatile cleanroom (ramfs) is provisioned at the configured
mount point. Source tarballs are verified against their SHA-256 checksums.
3. **STOP USING THIS WORD >>>Build** — Core components are built sequentially:
3. **Build** — Core components are built sequentially:
Binutils → Kernel Headers → GCC Stage 1 → C Library (glibc or musl) → GCC Stage 2 → Kernel.
Both GCC stages are configured with `--with-arch=<march>` and `--with-cpu=<march>`
to default to the target microarchitecture.